Santa Clara, CA, Feb. 02, 2024 (GLOBE NEWSWIRE) -- Ecosystem collaboration will be the key strategy to overcome the functional scaling, time-to-market, and economic challenges of heterogeneous chiplet integration, according to Alchip Technologies.
In a paper presented at Chiplet Summit on February 6th, Alchip urged semiconductor ecosystem collaboration to seamlessly integrate the strengths of the entire supply chain to extend the boundaries of Moore’s law.
The ASIC leader demonstrated a model for collaboration in the paper on a critical level, the integration of silicon-proven IP into a MCM and 2.5D/3D manufacturing platform, featuring Alchip’s AI/High-Performance advanced packaging.
The collaboration includes many features, such as architecture and simulation/ verification reports, and early PPA, SI/PI and power/thermal evaluations.
The paper, entitled “Accelerate IO & Memory Chiplet Design for Multi-Die Systems” was presented by industry-veterans Erez Shaizaf, Alchip’s Chief Technology Officer.
Mr. Shaizaf focuses on system technology solutions, based on 25-years of experience in VLSI, hardware, and system engineering. He has performed numerous successful silicon reticle tape-outs, on advanced technology nodes and high-speed interfaces.
“Switching from monolithic SoCs to multi-die systems creates many cost, time-to-market, and heterogeneous die integration challenges. Companies must partner and get ready in advance to provide essential technologies at fast time-to-market and expertise that designers can leverage to meet requirement,” Mr. Shaizaf explained.
Chiplet Summit Participation
The Chiplet Summit is being held February 6-8 at the Santa Clara Convention Centers and covers the latest architectures, development platforms and methods, and applications. Expert panels will discuss best choices, as well as likely breakthroughs and long-term trends.
Alchip is making available presentations and technical material at its booth in the Summit’s exhibition hall. The material highlights the company’s high-performance ASIC capabilities, including its industry-leading advances in advanced packaging technology, flexible engagement model, and advanced technology track record.
“Alchip works with an entire value chain to deliver leading edge advance packaging and process capabilities required by today’s high-performance computing ASIC market. Chiplet Summit promotes chiplet technology that revolutionize the way we develop leading-edge devices. We are leading this emerging technology,” explained Dave Hwang, Senior Vice President, Business Development and Marketing at Alchip.
For more information about Alchip, go to www.alchip.com
For more information about Chiplet Summit, go to chipletsummit.com
About Alchip
Alchip Technologies Ltd., founded in 2003 and headquartered in Taipei, Taiwan, is a leading global provider of silicon and design and production services for system companies developing complex and high-volume ASICs and SoCs. Alchip provides faster time-to-market and cost-effective solutions for SoC design at mainstream and advanced process technology. Alchip has built its reputation as a high-performance ASIC leader through its advanced 2.5D/3DIC design, CoWoS/chiplet design and manufacturing management. Customers include global leaders in AI, HPC/supercomputer, mobile phones, entertainment device, networking equipment and other electronic product categories. Alchip is listed on the Taiwan Stock Exchange (TWSE: 3661).
About Chiplet Summit
Chiplet Summit showcases the emerging chiplets market. It features the trends and people leading the adoption of this new technology in designing a wide variety of extremely large integrated chips. The Summit is a product of Semper Technologies.
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