Sidense to Present at DesignCon in Silicon Valley

CTO Wlodek Kurjanowicz to Present a Technical Paper on "Evaluating Embedded Non-Volatile Memory for 65nm and Beyond"

 | Source: Sidense Sidense

OTTAWA--(Marketwire - January 28, 2008) - Sidense, a leading developer of Logic Non-Volatile Memory (NVM) IP cores, will be presenting a key technical paper at DesignCon in Santa Clara, California on February 6. The paper will review the history of antifuse technology in silicon products and describe in detail one type of antifuse based on non-reversible oxide breakdown. The presentation will conclude by comparing some key characteristics of different oxide-breakdown memory storage technologies, along with more traditional embedded non-volatile (NVM) technologies, for implementation at the 65nm process node and beyond. 

What:     Sidense technical presentation on "Evaluating Embedded
          Non-Volatile Memory for 65nm and Beyond"

Who:      Wlodek Kurjanowicz, Sidense CTO

Where:    DesignCon
          Santa Clara Convention Center
          Santa Clara, CA

When:     February 6, 2008 at 9:40AM

Contact:  For additional information or to schedule a meeting at DesignCon
          to speak with Mr. Kurjanowicz, please contact Jim Lipman of Cain
          Communications at 925-606-1370, jlipman@caincom.com

About Sidense

Sidense provides secure, dense and reliable non-volatile one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution.

Sidense OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. Ideal applications include analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit www.sidense.com.

About DesignCon

Now in its twelfth year, the International Engineering Consortium's DesignCon 2008 conference and exhibition will present more than 300 experts in its world-class educational program and 135 exhibitors on its cutting-edge exhibition floor this February 4-7, 2008 at the Santa Clara Convention Center in Santa Clara, CA. Agilent Technologies serves as the official sponsor and Mr. Terry Morris, a fellow of the high performance systems division at Hewlett-Packard, serves as the conference chair. More than 120 premier educational sessions will complement five pavilions. The DesignVision Awards and DesignCon Paper Awards also take place at the event giving tribute to outstanding contributions to the industry.

Contact Information: Media Contact: Cain Communications for Sidense Jim Lipman Tel: 925-606-1370 Email:

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