Dhrystone V 1.1 Benchmark
Code Size SRAM DMIPS
HI-TECH C PRO 2939 5527 2.91
non-OCG Compiler 5763 5540 1.87
Difference -49.0% -0.2% +55.4%
HI-TECH's C PRO compiles Silicon Labs' Ethernet boot loader with 30%
smaller code and 20% less SRAM usage (Table 2)
SiLabs' Ethernet Boot Loader
(8051F340)
Code Size SRAM
HI-TECH C PRO 6708 955
non-OCG Compiler 9584 1193
Difference -30% -20%
Faster Interrupts Cuts Power Drain By 20% -- HI-TECH C PRO utilizes
"omniscient code generation™" (OCG) technology that collects
comprehensive data on every register, stack, pointer, object and variable
declaration across the entire program. It uses this information to optimize
register usage, stack allocations and pointers across the whole program. It
also ensures consistent variable and object declarations between modules
and deletes unused variables and functions.
Compilers without OCG compile each code module independently, without
information from the other parts of the program. Since they do not have
information about which registers are used throughout the whole program,
they often must save all eight general purpose registers, as well as other
on-chip resources for every interrupt. This process requires as many as 48
clock cycles. In contrast, an OCG compiler has comprehensive information
about every variable, register, and pointer throughout the entire program.
Since it knows exactly which registers will be used for any interrupt, it
can determine the context size dynamically, based on the state of the
program at the time of compilation. Code generated by an OCG compiler may
not need to save any registers during an interrupt routine, thereby saving
up to 48 cycles that are wasted by a non-OCG compiler.
Consider an application that samples an audio input at 8kHz using a 10bit
ADC that converts the sampled audio to mu-law encoding (8 bits, used in
telephone communications) and transmits this via an RS232 serial line at
115,200 baud, as well as processing the audio signal and driving a VU meter
showing current audio level. There are constraints on the CPU clock speed
related to the baud rate. The clock speed must be an exact multiple of the
baud rate (i.e. 115,200) while also being fast enough to execute the entire
instruction sequence 8000 times per second for each sample.
Code generated for Silicon Labs single-cell C8051F9XX by a non-OCG compiler
results in an average of 108 cycles to execute the interrupt service
routine and main loop overhead for each sample of data. The maximum number
of cycles is 135, requiring a clock rate of 1.08 MHz. However, 1.08 MHz is
not the correct multiple of the 115,200 baud rate, so the clock must be
increased to 1.1152MHz. At this clock rate the C8051F9XX consume an
average of 248µA.
Compiling the same program with HI-TECH C PRO results in code that executes
in 93 cycles, with a maximum of 110 cycles and a clock rate of 880 kHz.
Achieving the correct multiple of the baud rate results in clock rate of
921.6 kHz. At this clock rate, the C8051F9XX consumes an average of 202µA
or 22% less than the device executing the non-OCG code.
Eliminates the Need for Memory Space Qualifiers -- Silicon Labs' C8051
microcontrollers have a hierarchical memory structure with 6 different but
overlapping memory spaces. Compiler vendors provide extensions to the C
language that allow the programmer to manually specify the memory space for
each variable to improve the speed of access. This manual specification
makes the code non-portable, and introduces additional work for the
programmer in achieving the best possible result. However, the allocation
of variables to memory spaces is unlikely to be optimal as program
development progresses, resulting in reduced performance of the generated
code.
HI-TECH C PRO completely eliminates this problem. Since it knows how
frequently each variable is used and which variables are dependent, it can
optimize pointers and position objects in the most efficient memory spaces.
Global and static variables are allocated to available memory spaces based
on their size, and the number of times they are referenced. Function
parameters and auto variables are assigned space on the compiled stack.
Additional code to access data in extended memory spaces is minimized or
eliminated. The compiler automatically allows variables to share the same
memory if their functions are not active at the same time, thereby reducing
RAM usage by as much as 80%. No manual programming or C-extensions is
involved in this process.
HI-TECH's OCG-enabled PRO compiler has intelligence about the complete set
of used variables and pointers across all program modules and their
frequency of use. It defines a set of address spaces for each pointer
variable that is optimally efficient for the C8051 architecture, without
any specific direction from the programmer. It also knows exactly how big
the stack must be and where it will be located before the code is
generated. It allocates the most frequently used variables into the most
readily accessible RAM and puts less frequently used data into XDATA RAM.
This results in improved code density by reducing the number of longer movx
instructions. It can achieve substantial performance improvement while also
freeing up SRAM.
Register Coverage. Conventional C8051 compilers reserve up to seven
specific registers to store parameters for called functions. If the
parameters for the function require more than seven registers, the
additional parameters are stored on, and passed to the called function,
using the stack (in RAM) -- a cycle-intensive process that degrades
performance and leads to increased RAM usage. Called functions frequently
call other functions, which may in turn call other functions. For example,
if code calls a function, which then calls a second function, the
parameters for the first function will have to be saved to the stack to
make room for the parameters for the second function. If this second
function calls a third function, the parameters for the second function
will also have to be saved to the stack to make room for the parameters of
the third function. Data will have to be shifted continuously between the
stack and the registers. This process wastes both cycles and RAM. It also
results in code bloat due to the extra instructions required to save
function parameters to the stack.
The omniscient code generator in HI-TECH's C PRO compiler has perfect
knowledge about which registers are available and which registers are not
available at any point in the program. It can optimize register usage
dynamically without any arbitrary constraints. When there are two- or
three-deep function calls, the OCG compiler allocates parameters for
different functions into non-overlapping register sets, often completely
eliminating the need to store parameters into memory. This results in
better utilization of the available registers, fewer cycles wasted moving
parameters between the stacks and the registers, and less RAM usage. It
also contributes to smaller code size by reducing or eliminating the need
for code to save registers to the stack.
Debugging With Optimizations. HI-TECH's C PRO compiler for the Silicon Labs
C8051 is the only compiler on the market that supports debugging of code
with the compiler optimizations turned on. As a rule, code compiled with
full optimization can be difficult or impossible to debug, making it very
difficult to identify bugs that may be causing the system to function
incorrectly. HI-TECH's C PRO compiler automatically preserves all the
relationships between the object code and the original C-code, enabling the
quick and simple debugging of optimized code.
Seamlessly Integrated with Silicon Labs' Integrated Development
Environment. HI-TECH's C PRO compiler is seamlessly integrated into Silicon
Labs IDE, as well as most 3rd-party development tools. HI-TECH C PRO runs
on multiple platforms including Windows (2000, XP, Vista 32/64) Linux and
Mac OS X. Library code and runtime modules included. HI-TECH's C PRO
compiler supporting Silicon Labs C8051 is available with full source code
to all library routines, including a run-time start-up module that is
automatically customized for the code each time the compiler is run. There
are no restrictions or limitations on use of executable library code.
Pricing and Availability. HI-TECH C PRO for the Silicon Labs 8051 MCU
Family is available now at the introductory price of US$1195, through
December 31, 2008, after which it will retail for US$1495. It includes,
free of charge, HI-TECH Priority Access™ (HPA) -- 12 months access to
updates and technical support -- as well as a 30 day money back guarantee.
Multi-user, and educational user discounts are available.
Free Full-featured Evaluation. A fully functional 45-day evaluation version
of HI-TECH C PRO for the Silicon Labs 8051 MCU Family is available for
download, free of charge, at HI-TECH's website http://silabs.htsoft.com.
Additional information on HI-TECH C PRO for the Silicon Labs 8051 MCU
Family is available at
http://silabs.htsoft.com/products/compilers/silabs-8051.php.
About HI-TECH Software. HI-TECH Software is a world class developer of
development tools for embedded systems, offering compilers and an Eclipse
based IDE (HI-TIDE) for 8-, 16-, and 32-bit microcontroller and DSC chip
architectures from Microchip, Cypress, Silicon Labs, Atmel, NXP and other
major MCU vendors. The company is the leading third-party supplier for the
entire range of Microchip's PICmicro® MCUs and DSCs, with 64% market
share, and the compiler vendor-of-choice for Cypress Semiconductors' PSoC
mixed signal arrays, MCUs and DSCs, and has been providing best-in-class
8051 compilers for for over 15 years.
HI-TECH's customers include tens of thousands of embedded system developers
including Fortune 100 companies, such as General Motors, Whirlpool,
Qualcomm, and John Deere.
Founded by Clyde Stubbs, in 1984 in Brisbane, Australia, HI-TECH Software
has an office in the US and an extensive network of distributors around the
globe.
Contact Information: Contacts: Nancy B. Green The William Baldwin Group +1 650 856 6192 Nicky Douglas HI-TECH Software +61 7 3722 7777