Conference program now available; Registration open for DVCon Europe 2018
MUNICH, Germany, Sept. 25, 2018 (GLOBE NEWSWIRE) -- The Design and Verification Conference (DVCon) Europe 2018, taking place in Munich, Germany on October 24th and 25th, 2018 has announced two keynote speakers. Dr. Stefan Jockusch, the vice president of strategy at Siemens PLM Software, Inc. will deliver a speech entitled “Driving Digitalization With A Boundary Free Innovation Platform.” Philippe Magarshack, group vice president of the MDG Group at ST Microelectronics will present “Accelerating IoT Device Development - from Silicon to Developer Tools.” Both keynote speeches are synonymous with a rich conference program centered around the application of design and verification methodologies and standards and address emerging topics such as Machine Learning, Automotive Safety and Security, and the Internet of Things.
“This year’s DVCon Europe introduces a variety of exciting, innovative topics of great interest to the European design and verification community, including functional safety, virtual prototyping, machine learning, portable stimulus, RISC-V and many more,” noted Martin Barnasconi, DVCon Europe 2018 general chair. “We’ve created a strong technical program, which will be complemented with two fantastic keynotes presented by Stefan Jockusch and Philippe Magarshack, two well-known players in the European electronics community in driving innovation and leading edge technologies across our continent.”
Dr. Jockusch’s keynote, “Driving Digitalization With A Boundary Free Innovation Platform” will be on October 24th, the first day of the conference. We are witnessing a radical change of the way products are created, produced, and utilized. As a consequence of continuing digitalization, leading technology companies are pursuing the idea of a complete, high fidelity “digital twin” that makes the boundaries between the design process of mechanical parts, electronics, embedded software, sensors and specialized IC and sensor technology disappear. The talk will discuss how this digital twin is affecting autonomous driving, additive manufacturing, IoT technology and many other applications.
On October 25th Mr. Magarshack will deliver the second conference keynote address, “Accelerating IoT Device Development - from Silicon to Developer Tools.” The Internet of Things is accelerating thanks to the broad availability of affordable building blocks for IoT devices combined with ubiquitous wireless connectivity, cloud computing and artificial intelligence. The development of IoT SoCs pose a number of challenges for chipmakers in order to enable successful first silicon and fast bring-up. This talk addresses these topics as well as some of the perspectives for IoT applications.
DVCON EUROPE 2018 PROGRAM AND REGISTRATION
Registration is now open for DVCon Europe 2018. The conference’s focus on practical applications of the latest design and verification techniques employed on electronic semiconductors and systems has assured its position as the premier event for electronic design and verification engineers. It attracts many hundreds of industry stakeholders who come to learn about new methodologies, tools, standards and techniques that further their organization’s opportunities for innovation.
The conference program offers a broad and extensive range of tutorials, papers, panels, and keynote speeches. The event also includes an exhibition, receptions and other opportunities for industry networking and interaction. With the addition of a fourth track, the program covers:
- System Level Design and Software Driven Verification
- Advanced Verification & Validation
- Functional Safety and Machine Learning Applications
- IP Reuse and Design Automation
- Analog and Mixed-Signal Design & Verification
- Open Source Processor and IP Methodologies
This year’s conference is co-located with the third SystemC Evolution Day, a full day technical workshop on the SystemC standard and ecosystem, to be held on October 23rd, 2018. In several in-depth sessions, selected current and future standardization topics around SystemC will be discussed in order to accelerate their progress for inclusion in future Accellera/IEEE standards.
ABOUT THE SPEAKERS
Dr. Stefan Jockusch is vice president of strategy for Siemens PLM Software, a business unit of the Siemens Digital Factory Division. Dr. Jockusch drives strategic business planning and market intelligence as well as coordinates business activities across all Siemens PM Software business segments and with Digital Factory Division leadership. Dr. Jockusch has served in a number of business leadership and R&D management roles, driving the development and market introduction of radically innovative mechatronic systems. Prior to his current assignment, Dr. Jockusch was vice president of automotive industry strategy, leading the company’s business development and portfolio planning efforts for the automotive industry. He began his career at Siemens as a management consultant with Siemens Corporate Technology. He later moved to Siemens AG as executive board assistant for the industry, transportation and technology sectors, where he led several strategic initiatives. A U.S. and German citizen with broad international experience, he relocated to the United States in 2001 and later decided to make the U.S. his family’s permanent home. Stefan holds a PhD summa cum laude in natural sciences from University of Bielefeld and a master’s degree in physics from the University of Göttingen.
Philippe Magarshack is MDG group vice president at ST Microelectronics, responsible for Microcontrollers and Digital ICs Group (MDG) Special Projects. From 1985 to 1989, Magarshack worked as a microprocessor designer at AT&T Bell Labs in the USA, after which he joined Thomson-CSF in Grenoble, France, and took responsibility for libraries and ASIC design kits for the military market. In 1994, Magarshack joined the Central R&D Group of SGS-THOMSON Microelectronics (now STMicroelectronics), where he held several roles in CAD and libraries management for advanced integrated-circuit manufacturing processes. In 2005, Magarshack was appointed group vice president and general manager of Central CAD and Design Solutions at STMicroelectronics’ Technology R&D and Manufacturing organization. In 2012, he was promoted to ST’s executive vice president in charge of Design Enablement & Services. Magarshack has been president of the Minalogic Collaborative R&D Cluster in Grenoble since June 2014. Philippe graduated with an engineering degree in Physics from Ecole Polytechnique, Palaiseau, France, and with an Electronics Engineering degree from Ecole Nationale Supérieure des Télécommunications in Paris, France.
ABOUT DVCON EUROPE
The Design and Verification Conference (DVCon) Europe is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative™, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design. One of three DVCon events around the globe, DVCon Europe 2018 will include 2 keynote speeches, panel sessions, a broad range of papers in four tracks, 16 tutorials and an exhibition with demonstrations from leading tool, IP and service providers. It will be held at the Holiday Inn Munich City Center, Munich, Germany on the 24th and 25th of October, 2018. For more details and registration, visit www.dvcon-europe.org. Follow DVCon Europe on #dvconeurope.
ABOUT ACCELLERA SYSTEMS INITIATIVE
Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership here. Follow @accellera on Twitter or to comment, please use #accellera. Accellera Global Sponsors are: Cadence Design Systems, Inc.; Mentor, A Siemens Business; and Synopsys, Inc.
Accellera, Accellera Systems Initiative and DVCon are trademarks of Accellera Systems Initiative, Inc. All other trademarks and trade names are the property of their respective owners.
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