- The challenge emphasizes the creation of analog and mixed-signal chip-based IP to address the needs of real-world IoT applications
- Approved designs receive a Tiny Tapeout entry and chances for more rewards, including a quarter chipIgnite shuttle run slot, valued at approximately $2,500.
PALO ALTO, Calif., Feb. 15, 2024 (GLOBE NEWSWIRE) -- Efabless Corporation, the creator platform for chips, is excited to announce the launch of the first Chipalooza Analog and Mixed-Signal Design Challenge, an innovative competition aimed at engineers and designers around the globe. This challenge seeks to foster the creation of open-source chip-based Intellectual Property (IP) for Internet of Things (IoT) machine learning applications.
About the Challenge
Participants are invited to design open-source analog and mixed signal chip-based IP, based on a candidate list provided by Efabless. This initiative aims to enrich the next-generation Caravel architecture with competitive analog and mixed-signal circuits, to serve as essential resources for designers. Furthermore, it will contribute to the creation of the world’s first major open-source collection of analog and mixed-signal IP, facilitating academic, commercial, and personal application advancements.
"Through the Chipalooza Design Challenge, we are not only advancing the capabilities of IoT applications but also democratizing access to analog and mixed-signal IP. This open-source initiative is poised to catalyze innovation across the industry," said Tim Edwards, senior vice president of analog design at Efabless.
The forthcoming Caravel harness chip upgrade significantly enhances its predecessor, focusing on IoT machine learning and other low power applications by offering designers a broader array of resources beyond traditional processors. It addresses the critical needs of IoT applications for real-world connectivity, incorporating essential functionalities such as analog-to-digital and digital-to-analog conversion, signal conditioning, analog signal processing, and efficient power management for low-power, battery-operated devices, plus temperature sensing and more.
Awards and Recognition
Approved design proposals will receive a free Tiny Tapeout entry, with additional rewards offered at various stages of the design and review process, including a free quarter slot on a future chipIgnite shuttle run valued at approximately $2,500. Each participating team will also receive a development board and a packaged test chip to assist in functional verification of their designs.
Participation and Further Information
Designers and engineers interested in participating in the Chipalooza Analog and Mixed-Signal Design Challenge or seeking further information are encouraged to visit efabless.com/analog-and-mixed-signal-design-challenge.
Webinar: Friday, February 16
Join us for a webinar on Friday, February 16th, to learn more about the design contest, understand the expectations, and have your questions answered. To register, please click here.
Efabless is committed to driving innovation and excellence in the field of chip design. We invite the engineering community to join us in this exciting challenge.
Contact:
Press Contact
Andrea Vedanayagam
andrea@efabless.com
408.656.4494
