SAN JOSE, Calif., Feb. 22, 2024 (GLOBE NEWSWIRE) -- SmartDV™ Technologies, provider of flexible, highly configurable, customizable semiconductor design IP (intellectual property) and verification IP, is taking a fresh look at IP deployment and customer support under the leadership of Vice President of Application Engineering Sergio Marchese.
In an industry where off-the-shelf IP cores are ubiquitous, the additional flexibility of SmartDV’s “IP Your Way” is attractive to customers who need to customize IP to meet their unique chip design needs. Customization necessitates a deeper customer-supplier relationship than is typical in the IP space, and SmartDV quickly saw the need for a streamlined process for specifying projects, delivering IP, and supporting users.
SmartDV’s application engineers (AEs) support customers throughout the entire engagement lifecycle: from IP evaluation and configuration, through to customization considerations, delivery, and silicon bring-up. The engagement follows a well-defined, documented process that allows for the flexibility of requirement changes (common in most projects); interfaces between the user and the research and development team designing the IP; and ensures predictability and transparency.
As VP of application engineering, Sergio Marchese is creating a new team and shifting the focus from IP deliverables to IP consumables—guiding the deployment of tools and processes that put the experience of both customers and SmartDV employees at the center. “SmartDV’s AEs are on a mission to make fast, friendly, expert support a reality for every IP user,” Marchese proclaimed. ”We are the customer’s arm inside SmartDV. We aim to be their trusted advisor, to deeply understand their project needs and expectations, and to ensure that they can leverage the IP that SmartDV provides to make their chip designs successful. The changes we have put in place over the past two years, coupled with robust plans for expanding our team, have set us on the right path to achieve these goals.”
About Sergio Marchese
Sergio Marchese is Vice President of Application Engineering at SmartDV Technologies. Sergio has nearly 25 years of experience in electronic chip design and deployment of advanced hardware development solutions across Europe, North America, and Asia. His expertise covers IC design, functional verification, safety standards (including ISO 26262 and DO-254), and detection of hardware Trojans and security vulnerabilities. Sergio is passionate about enabling the next generation of high-integrity chips that underpin the Internet of Things, 5G, artificial intelligence, and autonomous vehicles.
About SmartDV
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force one-size-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Learn more about SmartDV at www.smartdvtech.com.
Connect with us on LinkedIn.
SmartDV, SmartDV Technologies, SmartDV NA, SmartCompiler, IP Your Way, and the SmartDV logo are trademarks of SmartDV Technologies India Private Limited. Any and all other trademarks present in this release are the property of their respective owners. All rights reserved.
Media Contact
McKenzie Ross
Vice President of Marketing, SmartDV
press@smartdvtech.com
A photo accompanying this announcement is available at https://www.globenewswire.com/NewsRoom/AttachmentNg/a91a5815-98cf-417c-bbef-c9d06ce32eb5